1 Topic by tz

  • tz
  • Chum
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  • Registered: 2010-09-15
  • Posts: 71

Topic: I2C at 400k or other higher speed

I asked this in the generic hardware section, but it is for this board.

The default I2C speed is 100kHz.  I need it to go faster, 400k or higher.  How do I set it to do that, or do I have to patch the kernel or a module (and if so, how).

  • Registered: 2011-05-11
  • Posts: 2

Re: I2C at 400k or other higher speed

Hi,

I have seen in the IMX reference manual (chapters 25.4.2=>4) the description of registers HW_I2C_TIMING0-2. It seems that there is the configuration to make the i2c clock settings.

Also, take a look at the smtp378x_i2c file in the falconwing sources for the Chumby. You may try to change they and see what happens. But the documentation clearly states that the Freescale i2c speed is either low (100 Khz) or high (400 Khz), not more.

regards

3 Reply by tz

  • tz
  • Chum
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  • Registered: 2010-09-15
  • Posts: 71

Re: I2C at 400k or other higher speed

I know about the registers.  The problem is that the EXISTING CODE at whatever level is setting it to 100kHz and somewhere in there is where I have to set the registers.  There may be something buried in /sys, /proc, or a parameter to the loadable module, or I may have to recompile.

regutil can set the registers, but every time I set them using regutil, the driver (at the low level) or something else sets them back.

It also seems to be different between the hackerboard and the kernel source, or maybe I just haven't found the initialization.

4 Reply by tz

  • tz
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  • Registered: 2010-09-15
  • Posts: 71

Re: I2C at 400k or other higher speed

Doesn't anyone know anything about the I2C section?

The chumby hackerboard code has BOTH timing setting sections commented out.  And there are no other references in the code to HW_I2C_TIMING*.  Something is setting them but I don't have any idea what it may be.  Is something reading in the background as a program or script?

        /* Take controller out of reset */
        HW_I2C_CTRL0_CLR(BM_I2C_CTRL0_SFTRST | BM_I2C_CTRL0_CLKGATE);
        udelay(10);

/*       * Set timing
         * High time = 120 clks; read bit at 48 for 95Khz/24mhz
         * Low  time = 128 clks; write bit at 48 for 95khz/24mhz
*/

/*
        Don't set 400khz by default; stfm1000 needs 100khz at the start.
        HW_I2C_TIMING0_WR(0x00780030);
        HW_I2C_TIMING1_WR(0x001F000F);
        HW_I2C_TIMING2_WR(0x0015000D);
*/
    /* 9/30/2009 SMC - Yes, but we're not using the STFM1000, so there. */
    /*
        HW_I2C_TIMING0_WR(0x000F0007);
        HW_I2C_TIMING1_WR(0x001F000F);
        HW_I2C_TIMING2_WR(0x0015000D);
    */

        dev_dbg(dev, "I2C module version %x\n ", HW_I2C_VERSION_RD());
        hw_i2c_init_dma(dev);
        return 0;
}

  • Registered: 2008-06-27
  • Posts: 518

Re: I2C at 400k or other higher speed

Hi tz,

The values listed there were lifted directly out of the manual you have there.  Towards the time we were going to ship the first chumby Ones, we thought we'd try upping the timing by a little.  We saw a few problems when we tried that, mostly I think due to the radio or the accelerometer not running well at that speed.  The details elude me.  The commented-out code stayed around, though.

The peculiarities of the FM radio also required a lot of nasty hacking of the stock Freescale driver, as you've no doubt noticed.

The only thing I can think of that's resetting HW_I2C_TIMINGn is that the driver looks like it performs a whole-block reset if it gets a BM_I2C_CTRL1_NO_SLAVE_ACK_IRQ.  After it resets the block it doesn't reset HW_I2C_TIMINGn, leaving them to default to their default values, which are 100 kHz.  That would explain why you'd see the values get reset if an error occurred.

You might try patching reset_i2c_module() as well as stmp378x_i2c_probe() in drivers/i2c/busses/i2c-stmp378x.c to set the timing.