Topic: GPIO Speed

Hi Chumbians!

I have a question - how rapidly is it possible to update the state of the GPIO pins on the hacker board?

I'd like to use the hacker board as a digital word generator,
e.g. squirt digital patterns out of the GPIO pins.
The patterns I'd like to generate can be run-length encoded to a high degree.

e.g. I would like to output

0x00000 * 100 clock cycles
0x00001 *  50 clock cycles
0x00003 * 100 clock cycles
0x00001 * 50 clock cycles
0x00000 * 10,000 clock cycles - (DRAM refresh can take place here)

(etc)

It's important that the generation is deterministic and reproducible,
e.g. always 100,50,100,50,10000, clock cycles, or whatever is actually possible.

Could someone who knows about the assembly on ARM9 and/or the bandwidth out of the GPIO ports
give me a place to look for this info? Much appreciated!

Re: GPIO Speed

I haven't seen any characterization of that sort of thing -- Linux isn't an RTOS so it's not the sort of thing I've worried about.

Having said that, the code seems like it would be incredibly simple, and is the sort of thing that could be loaded into OCRAM and executed from there without needing to worry about DRAM refreshes.  You have 32K of OCRAM that's completely unused in the current kernel that resides at real offset 0x00000000.

Latency of OCRAM is very low, and takes at most two cycles.

I'm afraid I don't have any input on the other questions, sorry.