Topic: The Damn Nand Flash

Hi guys, first of all kudos to all of you at chumby ind. !!! Great work!
I'm developing an MX21 based module starting from the ADS schematics. The first attempt busted because of all bga design and a third party manufacturer that didn't know what to do with all these balls.... The second one is doin' good but last week i found the impossibility to program the flash (with the very bad HAB toolkit from freescale.... you surely know!!) I checked all the signals and routing and parsed the datasheet between the samsung flash parts, BGA and TSOP just to find just ONE difference.... I almost lost my sight to soldering little wires to the .5 mm pins to check with an oscope when i stumbled across your schematics and the AND gate on the signals!!!! Is that the panacea? I hope so, with a little luck I can arrange to solder on the fly the gate and program the flash!!!
Tell me that is true please!
AH.. we wrote an OLED framebuffer driver for the MX21....
Final application: highres user interface for household appliances (big european manufacturer). Due to cost reasons this is starting as a research project. but I am interested in writing some widget to control ovens and washing machines (for now) with the Chumby. Am I eligible for a sample? smile

Re: The Damn Nand Flash

This is a fix in response to Errata number 12 in the MX21:

Failure:
Cannot support NAND Flash memory requiring CE_B pin held low during tR (data transfer from cell to register) period.

Details/Impact:
NAND Flash controller drives the NF_CE signal high in tR period. For NAND Flash memory that requires CE_B to be held low during the tRperiod, memory access failure may result.

Workaround:
This can be accomplished through the use of an external AND gate, where the NFCE and NFRB signals of the i.MX21 are
inputs to the AND gate and the output is connected to the CE_B input of the NAND Flash device.

Fix Status:
No fix solution is planned.

Depending on the type of flash (only particular NAND flash are affected) you use, this could solve your problem.

Don't look at the MX31's errata sheet. You'll pass out from its sheer size.

7BAA 2E53 01C1 DCFF 497B  E7F0 9699 A303 78F0 D9B9

Re: The Damn Nand Flash

I am using the same NAND that your schematics shows, but in the bigger size (K9F1208UOB-PCB0) . Is the same part that is used on the Freescale ADS daughterboard but in different package (TSOP1 vs FBGA).  I thought (unwisely) that the package was the only difference! I quickly had a look at the errata but since the board has just arrived I looked mostly on the HW debug side....  Actually, in the Commands table is clear that TSOP1 and TSOPW differs from the FBGA in the meaning of some signals!!!!! Hence the impact of the Errata....
Regarding the MX31, i will have a look at it not before the end of 2007! smile

Anyway, thank you so much for the HELP!

Re: The Damn Nand Flash

GOSH!

"Workaround:
This can be accomplished through the use of an external AND gate, where the NFCE and NFRB signals of the i.MX21 are
inputs to the AND gate and the output is connected to the CE_B input of the NAND Flash device."

On your schematics, the AND i s between Chip Select and Read Enable.....
Is that right? I tried both ways but nope.........

HELP

Re: The Damn Nand Flash

Sorry to bother Bunnie but I can't get any result from these moidifications... are you aware of other problems (apart from the seemingly different solution that you used to manage the Errata) in the interfacing of MX21 and NAND ?
On my knees,
D.

Re: The Damn Nand Flash

hi ,
   im on a project to design a nand flash controller for a nand flash memory... im new to it and i have lot of confusions on it... i hope somebody can help me
                 First of all who is the master of this controller... is it an ARM processor or is there another master controller which speaks to nand controller via ARM which inturn uses an AHB interface to communicate with the nand controller??Which one is true... someone plzz clear my doubt